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DS3232M

±5ppm, I2C Real-Time Clock with SRAM

Maxim Integrated

slave address byte with R/W = 1, reads the data byte

with a NACK to indicate the end of the transfer, and

generates a STOP condition. However, since requir-

ing the master to keep track of the memory address

counter is impractical, use the method for manipulat-

ing the address counter for reads.

Manipulating the Address Counter for Reads: A

dummy write cycle can be used to force the address

counter to a particular value. To do this the mas-

ter generates a START condition, writes the slave

address byte (R/W = 0), writes the memory address

where it desires to read, generates a repeated START

condition, writes the slave address byte (R/W = 1),

reads data with ACK or NACK as applicable, and

generates a STOP condition. See Figure 6 for a read

example using the repeated START condition to

specify the starting memory location.

Reading Multiple Bytes from a Slave: The read

operation can be used to read multiple bytes with a

single transfer. When reading bytes from the slave,

the master simply ACKs the data byte if it desires to

read another byte before terminating the transaction.

After the master reads the last byte it must NACK to

indicate the end of the transfer and then it generates

a STOP condition.

Applications Information

Power-Supply Decoupling

To achieve the best results when using the DS3232M,

decouple the VCC and/or VBAT power supplies with

0.1FF and/or 1.0FF capacitors. Use a high-quality,

ceramic, surface-mount capacitor if possible. Surface-

mount components minimize lead inductance, which

improves performance, and ceramic capacitors tend to

have adequate high-frequency response for decoupling

applications.

If communications during battery operation are not

required, the VBAT decoupling capacitor can be omitted.

Using Open-Drain Outputs

The INT/SQW output is open drain and requires an exter-

nal pullup resistor to realize logic-high output level. Pullup

resistor values between 1kI and 10MI are typical.

The RST output is also open drain, but is provided with

an internal 50kI pullup resistor (RPU) to VCC. External

pullup resistors should not be added.

SDA and SCL Pullup Resistors

SDA is an open-drain output and requires an external

pullup resistor to realize a logic-high level.

Because the device does not use clock cycle stretching,

a master using either an open-drain output with a pullup

resistor or CMOS output driver (push-pull) could be used

for SCL.

Battery Charge Protection

The device contains Maxim’s redundant battery-charge

protection circuit to prevent any charging of the external

battery.

Ordering Information

Package Information

For the latest package outline information and land patterns (foot-

prints), go to www.maximintegrated.com/packages. Note that a

“+”, “#”, or “-” in the package code indicates RoHS status only.

Package drawings may show a different suffix character, but the

drawing pertains to the package regardless of RoHS status.

+Denotes a lead(Pb)-free/RoHS-compliant package.

/V denotes an automotive qualified part.

PACKAGE

TYPE

PACKAGE

CODE

OUTLINE

NO.

LAND

PATTERN NO.

8 SO

S8MK+1

21-0041

90-0096

PART

TEMP RANGE

PIN-PACKAGE

DS3232MZ+

-40NC to +85NC

8 SO

DS3232MZ/V+

-40NC to +85NC

8 SO

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